Core: 16MHz STM8 core, featuring Harvard architecture and a 3-stage pipeline, supporting an extended instruction set Memory: 8KB Flash (20-year data retention after 100 cycles at 55°C), 1KB RAM, 128-byte true data EEPROM (up to 100,000 read/write/erase cycles) Clock and Power Management: Operating voltage 2.95V to 5.5V; 4 main clock sources (low-power crystal oscillator, external clock input, internal trimable 16MHz RC, internal low-power 128kHz RC); clock security system; low-power modes (wait, active halt, halt); peripheral clocks can be disabled independently; permanently active low-power power-on/power-off reset Interrupt Management: Nested interrupt controller (32 interrupts); up to 27 external interrupts (6 vectors) Timers: 16-bit advanced control timer (4 CAPCOM channels, 3 complementary outputs, dead-time insertion, synchronization); 16-bit general-purpose timer (3 CAPCOM channels); 8-bit basic timer; auto-wake-up timer; window and independent watchdog timers Communication Interfaces: UART (synchronous clock output, smart card, IrDA, LIN master mode); SPI (up to 8 Mbit/s); I²C (up to 400 Kbit/s) ADC: 10-bit ADC (±1 LSB accuracy, up to 5 multiplexed channels, scan mode, analog watchdog) I/O: Up to 28 I/O ports in 32-pin package (including 21 high-current drive outputs); highly robust design, resistant to current injection Development Support: Single-wire embedded interface module (SWIM), for fast on-chip programming and non-intrusive debugging Packages: LQFP32 (7×7mm), TSSOP20 (6.5×6.4mm), UFQFPN20 (3×3mm)