Up to 120 MHz operating frequency, with Memory Protection Unit (MPU), built-in single-cycle multiplication and hardware division, and DSP instruction set 16 KB to 64 KB of Flash program/data memory 4 KB of system memory for Bootloader, which can be configured as general user program and data area in one go sLib: Sets the specified main memory area as an executable code secure library area, where code in this area can only be called and not read 8 KB to 16 KB of SRAM 2.4 to 3.6 V supply and I/O pins Power-on/Power-down Reset (POR/PDR) Programmable Voltage Detector (PVD) Low-power modes: Sleep, Stop, Standby, with 4 WKUP pins to wake up from Standby mode Supports 5 32-bit backup registers 4 to 25 MHz crystal oscillator Embedded factory-calibrated 48 MHz RC oscillator (1% accuracy at 25°C, ±2% accuracy from -40°C to +105°C) PLL flexibly configurable with 31 to 500 multiplication and 1 to 15 division factors Embedded calibrated 40 kHz RC oscillator Calibrated 32 kHz crystal oscillator All I/Os can be mapped to external interrupts Almost all I/Os are 5 V input tolerant All I/Os are fast I/Os, with register access speed up to fAHB 5-channel DMA controller One 12-bit 2 MSPS A/D converter, with up to 15 external input channels One comparator, with 5 external input channels and 1 internal reference voltage One 16-bit 7-channel advanced timer, with 6 PWM outputs, dead-time control, and emergency stop functions Up to 5 16-bit timers, each with up to 4 channels for input capture/output compare/PWM or pulse counting and incremental encoder input One 16-bit basic timer ERTC: Enhanced RTC, with alarms, sub-second accuracy, and hardware calendar 2 I2C interfaces (supporting SMBus/PMBus) 2 USART interfaces; supporting master synchronous SPI and modem control; with ISO7816 interface, LIN, and IrDA capabilities 2 SPI interfaces (50 Mbps), both of which can be multiplexed as I2S interfaces and infrared transmitters