1. Chip Introduction The GD32F103xx device is a 32-bit general-purpose microcontroller based on the ARM Cortex-M3 RISC core, offering an optimal balance of processing power, reduced power consumption, and peripheral integration. The Cortex-M3 is a next-generation processor core tightly coupled with the Nested Vectored Interrupt Controller (NVIC), SysTick timer, and advanced debug support. The GD32F103xx integrates an ARM Cortex-M3 32-bit processor core operating at 108 MHz, with zero-wait-state flash access for maximum efficiency. It provides up to 3MB of on-chip flash memory and up to 96KB of SRAM. A wide range of enhanced I/Os and peripherals are connected to two APB buses. The device includes up to three 12-bit ADCs, up to two 12-bit DACs, up to ten general-purpose 16-bit timers, two basic timers plus two PWM advanced-control timers, as well as standard and advanced communication interfaces: up to three SPIs, two I²Cs, three USARTs, two UARTs, two IISs, one USB 2.0 FS, one CAN, and one SDIO. The device operates with a supply voltage of 2.6 to 3.6V and a temperature range of -40 to +85°C. 2. Product Features 32-bit ARM Cortex-M3 processor core, operating at up to 108 MHz Single-cycle multiplication and hardware division Integrated Nested Vectored Interrupt Controller (NVIC) 24-bit SysTick timer The Cortex-M3 processor is based on the ARMv7 architecture, supporting Thumb and Thumb-2 instruction sets. Some of the system peripherals listed below are also provided by the Cortex-M3: Internal bus matrix connected to ICode bus, DCode bus, system bus, Private Peripheral Bus (PPB), and Debug Access (AHB-AP) Nested Vectored Interrupt Controller (NVIC) Flash Patch and Breakpoint (FPB) Data Watchpoint and Trace (DWT) Instrumentation Trace Macrocell (ITM) Memory Protection Unit (MPU) Serial Wire JTAG Debug Port (SWJ-DP) Trace Port Interface Unit (TPIU)